Semiconductor device

ABSTRACT

A semiconductor device comprises a substrate made of a semiconductor of diamond-type structure or a compound semiconductor of zincblende-type structure, and an active area formed in the substrate in which electron current flows and to which an intense electric field is applied. aid active area has a specific crystal face which is in a (011) zone or a (100) zone. Said current flows in the prescribed direction decided by the crystal axis in accordance with said crystal face so as to increase the mobility in said area.

O United States Patent [72}, Inventors llajime Maeda; [50] Field ofSearch 317/234, Yoshiyuki Takeishi, both of Tokyo; Tai 235 AS Sato,Yokohama; Hisashi Hal-a, Kamakura; Yoshlhiko Okamoto, Yokohama, all of[5 6] Rehrences cued Japan UNITED STATES PATENTS PP' 7,979 2,858,7301l/l958 Hanson 88/14 I Filed 1970 3,458,832 7/1969 McGroddy et al...331/107 1 Patented J 11,1972 3,476,592 ll/l969 Berkenlelit et al... 117/201 [7 Assianee ky Shibaura Electric 3,476,991 1 H1969 Mize et al.317/235 Kawasaki-shi, Japan [32] Priorities Feb 7, 1969 PrlmaryExaminer-James D. Kallam [33] Japan Attorney- Flynn & Fnshauf [31]44/8700;

1969 Japan 44/ 8701 ABSTRACT: A semiconductor device comprises asubstrate made of a semiconductor of diamond-type structure or a com-[54] SEMICONDUCTOR DEVICE pound semiconductor of zincblende-typestructure, and an ac- 7 Claims, 6 Drawing Figs. t1ve area formed 1n thesubstrate in WhlCh electron current flows and to which an intenseelectric field is applied. aid aci5 CL 317/2341 tive area has a specificcrystal face which is in a [01 1] zone or 515- 9:: a [100] zone. Saidcurrent flows in the prescribed direction decided by the crystal axis inaccordance with said crystal face so as to increase the mobility in saidarea.

SEMICONDUCTOR DEVICE This invention relates to a semiconductor device,such as an insulated-gate field effect transistor (an MlS-FET); aPN-junc- 7 tion field effect transistor (J-FET) or other semiconductordevice having an active areaon or in the wafer surface, or on theinterface contacting an oxide film.

Studies have been made on the lattice plane or crystal face of asemiconductor wafer to be used in a. semiconductor device, and crystalfaces suchas (111), (110), (112), (113) and (001) face are known to beuseful. Aparticular lattice plane is selected as the top main face ofthe wafer according to various factors such as surface conditions,density, noise and design of the semiconductor device. However, it hasnot all been known how the direction in which a current flows in thewafer influences the semiconductordevice.

Consequently, it is the object of the present invention to provide asemiconductor device in which current flows in the direction of highcarrier mobility by selecting an active area to a suitable lattice planeor crystal face and restricting the direction of current flow to aproper crystal axis, thus improving its characteristics.

In greater details, the present invention provides a semiconductordevice including a semiconductor substrate made of a semiconductor ofdiamond-type structure or a compound semiconductor of zincblendestructure-type, said substrate having an active area of a specificcrystalface, wherein upon said specific crystal face being in asubstantially [Oil] plane with an angle being defined by the normaldirection of said specific crystal face and a [011] axis ranging between0 to 3515'A, the direction of flow of the electron current isperpendicular to said [011] axis, and with said anole 6 ranging from3516 to less than 90, the direction of flow of the electron current isparallel to the [011] axis, and upon said specific crystal face beingsubstantially in a [100] plane with an angle 6 defined by the normaldirection of the crystal face between 0 to less than 45, the directionof flow of the electron current is parallel to a [100] axis.

When used in the present invention, the term [1 zone" should becrystaliographically construed in a broad sense and covers not only aspecial zone but also other zones equivalent thereto. Similarly, theterm [1 axis covers not only a special axis but also other axesequivalent thereto. Furthermore, the axis and zones may be respectivelyallowed to have errors thereof.

This invention can be more fully understood from the following detaileddescription when taken in connection with the accompanying drawings, inwhich:

FIG. 1 is a sectional view illustrating a semiconductor device embodyingthe present invention;

FIGS. 2A and 2B are schematic plan views of the device shown in FIG. 1,wherein the former is not according to the invention;

FIG. 3 is a graph showing the calculated values of electron mobility;and

FIGS. 4A and 4B are respectively sectional and plan views of asemiconductor device according to another embodiment.

Referring to FIGS. 1, 2A and 28, there will now be described oneembodiment according to the present invention.

There are first prepared N-type silicon wafers each hav ing a specificresistance of 5 to 25 ohmcm., whose top surfaces 11 are respectively sochosen as to assume lattice planes or crystal planes of (O13), (023),(O1 1), (233), (1 1 l), (322), (211), (311), (411), (811) and(l00)faces.In the top face of said wafer there are provided source and drainregions 12 and 13 spaced apart from each other and the top of saidsubstrate 10 is covered with a silicon dioxide film except on the facesof said regions. Source and drain electrodes 15 and 16, and a gateelectrode 17 are attached to said source and drain regions and to a partof said insulating film 14 between said two regions I2 and 13. Thus isconstructed MOS-type field effect transistors as shown in FIG. 1. Thetransistor of this type has an active area 18 of P-channel formed on thetop surface of said wafer under the gate electrode.

An example of fabricating such a transistor will be described withreference to FIG. I.

The substrate 10 of an N-type silicon wafer is subjected to a wet oxygengas at temperatures of 960 to l,OOO C. to form thereon the film 14 ofsilicon dioxide having a thickness of 5,000 to 6,000 A., said oxygen gashaving been passed through 80 C. water. Parts of the SiO, film 14 thusformed are removed by photoetching to allow the surface of wafer 10 tobe exposed in the form of two stripes. On the exposed surfaces of thewafer, viz portions from which the SiO, film has been removed, isdeposited BBr which is then diffused in the film by being heat-treatedat 1,050 C. to form the P-type source region 12 and P-type drain region13. Thereafter, the remaining SiO film left on the surface of the wafer10 is removed by an HP aqueous solution treatment. The Si wafer 10 isheattreated in a wet oxygen atmosphere for 4 minutes at 1, 145 C. andthen in a dry oxygen atmosphere for 10 to 15 minutes at 1,145 C. so asagain to form an SiO, film on the entire top surface of the wafer. Thefilm thus deposited is doped with phosphorus to-eliminate the effect offaults in the film. The SiO film deposited on the source region 12 anddrain region 13 is removed. Subsequently, an aluminum layer isevaporated on the entire SiO film and the source and drain regions. Thealuminum layer is then removed except for on the source and drainregions and on the part between both regions, thereby forming thesource, drain and gate electrodes 15, 16 and 17 on the source and drainregions and on the portion of Si0 between source and drain regionsrespectively. The wafer surface right below the gate electrode 17 formsa channel or active region, having a width W of, say, 100p. and a lengthL of, say, 20041.. Thesource and drain regions 12 and 13 are so arrangedas to enable an electric current to flow in a predetermined direction inthe active region after the direction of the crystal axis on the wafercrystal face has been determined by X-rays. When, a crystal facebelongs, for example, to a [01 I] zone (i.e., lies in a [OlT] plane), a(211) face is used as said top surface of the wafer 10. The surfacenormal direction is, as shown in FIG. 2A, taken in the direction of a[211] crystal axis, and the main face is disposed parallel to theintrinsic crystal face (211) within a fi tolerance. The source and drainregions 12 and 13 are arranged such that the direction of flow ofelectron current passing therebetween is either that of the [111] (or[lll]) crystal axis (FIG. 2A) or that of [Oil] (or [011 crystal axis(FIG. 28) whereby the direction of current f flow can be specifiedwithin a fi tolerance.

Alternatively, when a crystal face belongs, for example, to zone, a(023) face is used as said top surface of the wafer 10. The direction offlow of elec tron current is chosen to be that of the [T00] crystal axisor [032] axis.

A voltage V ==l0mV is impressed at both temperatures, 293 K. (normaltemperature) and 77 K. between source and drain regions, and anothervoltage V between the gate and source regions with the source electrodeand substrate short circuited, the mutual conductance gm was measuredand the field effect mobility t is obtained from the relationship:

em: the permittivity of the oxide film,

d= the thickness of the oxide film,

L the length of the channel, and

W= the width of the channel.

Transistors having a (211) and (023)face as well as other crystal facesas a main plane are manufactured by the same method as described above,and measured their mobility t As a result, it has been found that themobility p. of the transistors which have a main plane other than the(111) and (100) faces is affected by the direction in which currentflows through the transistor.

FIG. 3 shows the result of the maximum and minimum values of themobility p. in the case of V W-=25 V and at a normal temperature.

Generally, the larger the V V the smaller the mobility. But the relativerelationship between the curves shown in FIG. 3 is little affected. Inthe figure, V designates the gate voltage,

ll li between the (011) and (111) faces, while the mobility t along the01i is larger than that along the l l 0li between the (l 1 l) and 100)faces.

In the case of l00 zone, the mobility a in the l 00 is larger than thatin the l l00 between the (001) and (01 l faces, (001) face exclusive.

It has also been found that the results obtained at normal temperaturecan equally apply to those measured at 77 K. Although there is an errorof fl" between the designations of the wafer surface orientation and thedirection of current flow, the same results have been obtained even whenthe angle is purposely shifted with a :5 tolerance.

Consequently, the flow of a highly mobile carrier current can be bestutilized by selecting the direction of current flow of a metal oxidesilicon field effect transistor with respect to its specified'waferorientation to be normal to the 01T crystal axis in the case when thecrystal surface is selected between (01 l) and (l 1 l) faces l l 1) faceexclusive) when the main surface of the wafer belongs to 01 T zone andis parallel to the 01i crystal axis between (1 l l and (100) faces ((1 ll) and (100) faces exclusive).

According to this invention, similar results can be obtained not onlywhen semiconductors of diamond-type structure, for example, germanium,semiconducting diamond, boron nitride, are used but when compoundsemiconductors of zincblende-type structure, for example, galliumarsenide, gallium phosphide, antimonide, are used, insofar as theintensity E of an electric field in the semiconductor interface islarger than lXlO v./cm. For example, similar results have been obtainedby the use of germanium and gallium arsenide under the conditions E 6Xl0v./cm. and E 5 l0 v./cm., respectively.

In the above embodiment, the rectangular gate has been taken as anexample. It should be understood that the same results can be obtainedby the use of a comb-shaped gate with respect to the direction of themain electron current. Since the above phenomena are common to theelectron mobility in an intense electric field, similar effects can beproduced not only in metal oxide silicon field effect transistors butalso in PN- junction field effect transistors as described below withreference to FIGS. 4A and 4B.

The numeral denotes an N -type silicon substrate whose top main surfaceconsists of (023) face on which an epitaxial P-type layer 21 isdeposited to form a PN-junction 22 between the substrate and layer 21.On the upper side of the layer 21 are formed diffused or alloyed P -typesource and drain regions 23 and 24 and a difiused N -type gate region 25which are spaced from one another. Of course these source and drainregions 23 and 24 could be omitted as occasion demands. To the uppersurface of said regions 23 and 24 respec- I tively attached source anddrain electrodes 26 and 27, and on the opposite surfaces of thesubstrate and P-type layer two gate electrodes 28. On the upper part ofthe P-type layer except on the electrodes there is provided aninsulating film 29 such as a silicon dioxide film. In this transistor,the direction of current which flows between source and drain regions isselected to accord with the 100) or (T00) crystal axis.

We claim:

I. A semiconductor device comprising a substrate of a semiconductorselected from the group consisting of a semiconductor of diamond-typestructure and a compound semiconductor of zincblende-type structure.said substrate comprising an active area formed therein in whichelectron current flows and means for applying an intense electric fieldto said active area, said active area having a crystal face, and uponsaid crystal face being substantially in a [0l i] plane at an angle witha [Oli axis ranging between 0 to 35 l5' the direction of flow of eelectron current IS perpendicular to 0 the [Oll] axis, and upon saidcrystal face being substantially in [Oli] plane at an angle with a [0!l] axis ranging from 3516 to less than the direction of flow of saidelectron current is parallel to the [01 Y] axis, and upon said crystalface being substantially in a I00] plane at an angle with a [01 l] axisranging from 0 to less than 45, the direction of flow of said electroncurrent is parallel to the I00] axis.

2. A semiconductor device according to claim I wherein said substrateincludes source and drain regions spacedly formed in the top surfacethereof, each of which has a conductivity opposite to that of thesubstrate, an insulating film formed on the surface of said substratebetween said source and drain regions, a gate electrode formed on saidinsulating film, and said active area is a channel formed between thesource and drain regions.

3. A semiconductor device according to claim 1 wherein said substrateincludes at least one PN-junction of which major part is formed inparallel to the top surface thereof, and spaced source and drain regionsformed in said substrate, said active area being defined between saidregions.

4. A semiconductor device according to claim 1, in which the intensityof the high electric field formed within the active area is more than 1X10 v./cm.

5. A semiconductor device comprising a substrate of a semiconductorselected from the group consisting of a semiconductor of diamond-typestructure and a compound semiconductor of zincblende-type structure,said substrate comprising an active area formed therein in whichelectron current flows and means for applying an intense electric fieldto said active area, said active area having a crystal face, and uponsaid crystal face being substantially in a [Oli] plane at an angle witha [01 1] axis ranging between 0 to 3515, the direction of flow of theelectron current is perpendicular to a [Oli] axis.

6. A semiconductor device comprising a substrate of a semiconductorselected from the group consisting of a semiconductor 0f diamond-typestructure and a compound semiconductor of zincblende-type structure,said substrate comprising an active area formed therein in which anelectron current flows and means for applying an intense electric fieldto said area, said active area having a crystal face, and upon saidcrystal face being substantially in a [Oll] plane at an angle with a[011] axis ranging from 3516 to less than 90, the direction of flow ofthe electron current is in parallel to a [Oli] axis.

7. A semiconductor device comprising a substrate of a semiconductorselected from the group consisting of a semiconductor of diamond-typestructure and a compound semiconductor of zincblende-tpe structure, saidsubstrate comprising an active area formed therein in which an electroncurrent flows and means for applying an intense electric field to saidactive area, said active area having a crystal face, and upon saidcrystal face being substantially in a plane at an angle with a [01 1]axis ranging between 0 to less than 45, the direction of flow of theelectron current is in parallel to a [100] axis.

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2. A semiconductor device according to claim 1 wherein said substrateincludes source and drain regions spacedly formed in the top surfacethereof, each of which has a conductivity opposite to that of thesubstrate, an insulating film formed on the surface of said substratebetween said source and drain regions, a gate electrode formed on saidinsulating film, and said active area is a channel formed between thesource and drain regions.
 3. A semiconductor device according to claim 1wherein said substrate includes at least one PN-junction of which majorpart is formed in parallel to the top surface thereof, and spaced sourceand drain regions formed in said substrate, said active area beingdefined between said regions.
 4. A semiconductor device according toclaim 1, in which the intensity of the high electric field formed withinthe active area is more than 1 X 103 v./cm.
 5. A semiconductor devicecomprising a substrate of a semiconductor selected from the groupconsisting of a semiconductor of diamond-type structure and a compoundsemiconductor of zincblende-type structure, said substrate comprising anactive area formed therein in which electron current flows and means forapplying an intense electric field to said active area, said active areahaving a crystal face, and upon said crystal face being substantially ina (011) plane at an angle with a (011) axis ranging between 0* to35*15'', the direction of flow of the electron current is perpendicularto a (011) axis.
 6. A semiconductor device comprising a substrate of asemiconductor selected from the group consisting of a semiconductor ofdiamond-type structure and a compound semiconductor of zincblende-typestructure, said substrate comprising an active area formed therein inwhich an electron current flows and means for applying an intenseelectric field to said area, said active area having a crystal face, andupon said crystal face being substantially in a (011) plane at an anglewith a (011) axis ranging from 35*16'' to less than 90*, the directionof flow of the electron current is in parallel to a (011) axis.
 7. Asemiconductor device comprising a substrate of a semiconductor selectedfrom the group consisting of a semiconductor of diamond-type structureand a compound semiconductor of zincblende-tpe structure, said substratecomprising an active area formed therein in which an electron currentflows and means for applying an intense electric field to said activearea, said active area having a crystal face, and upon said crystal facebeing substantially in a (100) plane at an angle with a (011) axisranging between 0* to less than 45*, the direction of flow of theelectron current is in parallel to a (100) axis.